template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 1 0000 1 $BASE 10T 2 ;*************************************************** *********************** 3 ; "TEMPLATE" 4 ; 5 ; Version 1.0 Revised 3/2/2003 6 ; 7 ; George Heron, N2APB 8 ; 2419 Feather Mae Ct. 9 ; Forest Hill, MD 21050 10 ; email: n2apb@amsat.org 11 ; 12 ; This program serves as a standard "starting point", or template, for developing 13 ; other programs. It's useful because it contains all the basic elements of a 14 ; regular user application program. 15 ; 16 ; This code is intended to run on a Motorola 68HC908AB32 microcontroller and is 17 ; best assembled within the Integrated Development Environment editor, provided free 18 ; by Motorola as part of their HC908 development tool suite. 19 ; 20 ; Revision History: 21 ; ---------------- 22 ; 1 3/2/2003 Initial version 23 ; 24 ;*************************************************** *********************** 25 ; Copyright 2003 by G. Heron, N2APB. All rights reserved. For personal, non-profit use only. 26 ;*************************************************** *********************** 27 0000 28 include "../AB_REGS.INC" ;MC68HC908GP32 register defimitions 29 ; 68HC908AB32 Equates 30 0000 31 PTA EQU $0000 ; Ports and data direction 0000 32 PORTA EQU $0000 0000 33 PTB EQU $0001 0000 34 PORTB EQU $0001 0000 35 PTC EQU $0002 0000 36 PORTC EQU $0002 0000 37 PTD EQU $0003 0000 38 PORTD EQU $0003 0000 39 DDRA EQU $0004 0000 40 DDRB EQU $0005 0000 41 DDRC EQU $0006 0000 42 DDRD EQU $0007 43 0000 44 PTE EQU $0008 0000 45 PORTE EQU $0008 0000 46 PTF EQU $0009 0000 47 PORTF EQU $0009 0000 48 PTG EQU $000A template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 2 0000 49 PORTG EQU $000A 0000 50 PTH EQU $000B 0000 51 PORTH EQU $000B 52 0000 53 DDRE EQU $000C 0000 54 DDRF EQU $000D 0000 55 DDRG EQU $000E 0000 56 DDRH EQU $000F 57 58 ;* Serial Peripheral Interface Module (SPI) ******************************** 59 0000 60 spcr equ $10 ; SPI Control Register 0000 61 SPRIE equ 7 ; SPI receiver interrupt enable bit 0000 62 SPMSTR equ 5 ; SPI master bit 0000 63 CPOL equ 4 ; clock polarity bit 0000 64 CPHA equ 3 ; clock phase bit 0000 65 SPWOM equ 2 ; SPI wired-or mode bit 0000 66 SPE equ 1 ; SPI enable 0000 67 SPTIE equ 0 ; SPI transmit interrupt enable 68 0000 69 spscr equ $11 ; SPI Status and Control Register 0000 70 SPRF equ 7 ; SPI receiver full bit 0000 71 ERRIE equ 6 ; error interrupt enable bit 0000 72 OVRF equ 5 ; overflow bit 0000 73 MODF equ 4 ; mode fault bit 0000 74 SPTE equ 3 ; SPI transmitter empty bit 0000 75 MODFEN equ 2 ; mode fault enable bit 0000 76 SPR1 equ 1 ; SPI baud rate 0000 77 SPR0 equ 0 ; select bits 78 0000 79 spdr equ $12 ; SPI Data Register 80 81 82 ;* Serial Communications Interface (SCI) ********* ************************* 83 0000 84 scc1 equ $13 ; SCI Control Register 1 0000 85 LOOPS equ 7 ; loop mode select bit template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 3 0000 86 ENSCI equ 6 ; enable SCI bit 0000 87 TXINV equ 5 ; transmit inversion bit 0000 88 M equ 4 ; mode bit 0000 89 WAKE equ 3 ; wakeup condition bit 0000 90 ILTY equ 2 ; idle line type bit 0000 91 PEN equ 1 ; parity enable bit 0000 92 PTY equ 0 ; parity bit 93 0000 94 scc2 equ $14 ; SCI Control Register 2 0000 95 SCTIE equ 7 ; SCI transmit interrupt enable bit 0000 96 TCIE equ 6 ; transmissi on complete int enable bit 0000 97 SCRIE equ 5 ; SCI receive interrupt enable bit 0000 98 ILIE equ 4 ; idle line interrupt enable bit 0000 99 TE equ 3 ; transmitte r enable bit 0000 100 RE equ 2 ; receiver enable bit 0000 101 RWU equ 1 ; receiver wakeup bit 0000 102 SBK equ 0 ; send break bit 103 0000 104 scc3 equ $15 ; SCI Control Register 3 0000 105 R8 equ 7 ; received bit 8 0000 106 T8 equ 6 ; transmitte d bit 8 0000 107 ORIE equ 3 ; receiver overrun interrupt enable bit 0000 108 NEIE equ 2 ; receiver noise error int enable bit 0000 109 FEIE equ 1 ; receiver framing error int enable bit 0000 110 PEIE equ 0 ; receiver parity error int enable bit 111 0000 112 scs1 equ $16 ; SCI Status Register 1 0000 113 SCTE equ 7 ; SCI transmitter empty bit 0000 114 TC equ 6 ; transmissi on complete bit 0000 115 SCRF equ 5 ; SCI receiver full bit 0000 116 IDLE equ 4 ; receiver idle bit 0000 117 OR equ 3 ; receiver template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 4 overrun bit 0000 118 NF equ 2 ; receiver noise flag bit 0000 119 FE equ 1 ; receiver framing error bit 0000 120 PE equ 0 ; receiver parity error bit 121 0000 122 scs2 equ $17 ; SCI Status Register 2 0000 123 BKF equ 1 ; break flag bit 0000 124 RPF equ 0 ; reception in progress flag bit 125 ; 0000 126 scdr equ $18 ; SCI Data Register 0000 127 scbr equ $19 ; SCI Baud Rate Register 128 129 130 ;* External Interrupt (IRQ) ********************** ************************* 131 0000 132 intscr equ $1D ; IRQ Status and Control Register 0000 133 IRQF equ 3 ; IRQ flag bit 0000 134 ACK equ 2 ; IRQ interrupt request acknowledge bit 0000 135 IMASK equ 1 ; IRQ interrupt mask bit 0000 136 MODE equ 0 ; IRQ edge/level select bit 137 0000 138 ISCR EQU $001A 139 140 141 ;* Keyboard Interrupt Module (KBI) *************** ************************* 142 0000 143 intkbscr equ $1B ; Keyboard Status and Control Register 0000 144 KBSCR EQU $001B 0000 145 KEYF equ 3 ; keyboard flag bit 0000 146 ACKK equ 2 ; keyboard acknowledge bit 0000 147 IMASKK equ 1 ; keyboard interrupt mask bit 0000 148 MODEK equ 0 ; keyboard triggering sensitivity bit 149 ; 0000 150 intkbier equ $21 ; Keyboard Interrupt Enable Register 0000 151 KBICR EQU $0021 0000 152 KBIE4 equ 4 0000 153 KBIE3 equ 3 template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 5 0000 154 KBIE2 equ 2 0000 155 KBIE1 equ 1 0000 156 KBIE0 equ 0 157 158 159 ;* Clock Generator Module (CGMC) ***************** ************************* 160 0000 161 pctl equ $1C ; PLL Control Register 0000 162 PLLIE equ 7 ; PLL interrupt enable bit 0000 163 PLLF equ 6 ; PLL interrupt flag bit 0000 164 PLLON equ 5 ; PLL on bit 0000 165 BCS equ 4 ; base clock select bit 166 ; 0000 167 pbwc equ $1D ; PLL Bandwidth Control Register 0000 168 AUTO equ 7 ; automatic bandwidth control bit 0000 169 LOCK equ 6 ; lock indicator bit 0000 170 ACQ equ 5 ; acquisitio n mode bit 171 0000 172 PPG equ $001E ; PLL Programmin g Register 173 ; Multiplier Select bits [7:4] 174 ; VCO Frequency Multiplier bit [3:0] 175 176 ;* Configuration Registers (CONFIG) ************** ************************* 177 0000 178 CONFIG EQU $001F ; System configuration 0000 179 CONFIG1 EQU $001F 0000 180 CONFIG2 EQU $003F 181 0000 182 TASC EQU $0020 ; Timer A 0000 183 TACNTH EQU $0022 0000 184 TACNTL EQU $0023 0000 185 TAMODH EQU $0024 0000 186 TAMODL EQU $0025 0000 187 TASC0 EQU $0026 0000 188 TACH0H EQU $0027 0000 189 TACH0L EQU $0028 0000 190 TASC1 EQU $0029 0000 191 TACH1H EQU $002A 0000 192 TACH1L EQU $002B 0000 193 TASC2 EQU $002C 0000 194 TACH2H EQU $002D 0000 195 TACH2L EQU $002E 0000 196 TASC3 EQU $002F 0000 197 TACH3H EQU $0030 0000 198 TACH3L EQU $0031 template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 6 199 0000 200 TBSC EQU $0041 ; Timer B 0000 201 TBCNTH EQU $0042 0000 202 TBCNTL EQU $0043 0000 203 TBMODH EQU $0044 0000 204 TBMODL EQU $0045 0000 205 TBSC0 EQU $0046 0000 206 TBCH0H EQU $0047 0000 207 TBCH0L EQU $0048 0000 208 TBSC1 EQU $0049 0000 209 TBCH1H EQU $004A 0000 210 TBCH1L EQU $004B 0000 211 TBSC2 EQU $0032 0000 212 TBCH2H EQU $0033 0000 213 TBCH2L EQU $0034 0000 214 TBSC3 EQU $0035 0000 215 TBCH3H EQU $0036 0000 216 TBCH3L EQU $0037 217 0000 218 TSC EQU $004B ; Timer 0000 219 TCNTH EQU $004C 0000 220 TCNTL EQU $004D 0000 221 TMODH EQU $004E 0000 222 TMODL EQU $004F 223 224 225 226 ;* Analog-to-Digital Converter (ADC) ************* ************************* 227 0000 228 adscr equ $38 ; ADC Status and Control Register 0000 229 COCO equ 7 ; conversion s complete flag 0000 230 AIEN equ 6 ; ADC interrupt enable bit 0000 231 ADCO equ 5 ; ADC continuous conversion bit 0000 232 ADCH4 equ 4 ; \ 0000 233 ADCH3 equ 3 ; \ 0000 234 ADCH2 equ 2 ; ADC channel select bits 0000 235 ADCH1 equ 1 ; / 0000 236 ADCH0 equ 0 ; / 237 0000 238 adr equ $39 ; ADC Data Register 239 0000 240 adclk equ $3A ; ADC Clock Register 0000 241 ADIV2 equ 7 ; \ 0000 242 ADIV1 equ 6 ; ADC clock prescaler bits 0000 243 ADIV0 equ 5 ; / 0000 244 ADICLK equ 4 ; ADC input clock select bit 245 246 ;* Pullup Registers ******************************* template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 7 ******* 247 0000 248 PTDPUE EQU $003D 0000 249 PTFPUE EQU $003E 0000 250 PRTFPU EQU $003E 251 252 ;* System Integration Module (SIM) *************** ************************* 253 0000 254 sbsr equ $FE00 ; SIM Break Status Register 0000 255 SBSW equ 1 ; SIM break stop/wait 256 0000 257 srsr equ $FE01 ; SIM Reset Status Register 0000 258 POR equ 7 ; power-on reset bit 0000 259 PIN equ 6 ; external reset bit 0000 260 COP equ 5 ; COP reset bit 0000 261 ILOP equ 4 ; illegal opcode reset bit 0000 262 ILAD equ 3 ; illegal opcode address reset bit 263 ;MODRST equ 2 ; monitor mode entry module reset bit 0000 264 LVI equ 1 ; LVI reset bit 265 0000 266 sbfcr equ $FE03 ; SIM Break Flag Control Register 0000 267 BCFE equ 7 ; break clear flag enable bit 268 269 ;* Flash Memory ********************************** ************************* 270 0000 271 flcr equ $FE08 ; Flash Control Register 0000 272 HVEN equ %00001000 ; high-voltage enable bit mask 0000 273 MASS equ %00000100 ; mass erase control bit mask 0000 274 ERASE equ %00000010 ; erase control bit mask 0000 275 PGM equ %00000001 ; program control bit mask 276 0000 277 flbpr equ $FF7E ; Flash Block Protect Register 278 279 ;* Breakpoint Module (BRK) *********************** ************************* 280 0000 281 brkh equ $FE0C ; Break Address Register High template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 8 0000 282 brkl equ $FE0D ; Break Address Register Low 0000 283 brkscr equ $FE0E ; Break Status and Control Register 0000 284 BRKE equ 7 ; break enable bit 0000 285 BRKA equ 6 ; break active bit 286 287 ;* Low-Voltage Inhibit (LVI) ********************* ************************* 288 0000 289 lvisr equ $FE0F ; LVI Status Register 0000 290 LVIOUT equ 7 ; LVI output bit 291 292 ;* EEPROM programming registers ******************* *************************** 293 0000 294 EEDIVHNVR equ $FE10 295 0000 296 EEDIVLNVR equ $FE11 297 0000 298 EEDIVH equ $FE1A 299 0000 300 EEDIVL equ $FE1B 301 0000 302 eenvr equ $FE1C ;EEPROM Array Config Reg 0000 303 EEPRTCT equ 16 ;protection bit 0000 304 EEBP3 equ 8 ;block potection bit 3 0000 305 EEBP2 equ 4 ;block potection bit 2 0000 306 EEBP1 equ 2 ;block potection bit 1 0000 307 EEBP0 equ 1 ;block potection bit 0 308 0000 309 eecr equ $FE1D ;EEPROM Control Reg 0000 310 EEDUM equ 128 ;dummy bit 0000 311 EEOFF equ 32 ;power off 0000 312 EERAS1 equ 16 ;erase/program mode select bit 1 0000 313 EERAS0 equ 8 ;erase/program mode select bit 0 0000 314 EELAT equ 4 ;latch control 0000 315 EEAUTO equ 2 ;automatic termination of prgm/erase cycle 0000 316 EEPGM equ 1 ;program/erase enable 317 template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 9 0000 318 EEACR equ $FE1F 319 320 ;* Computer Operating Properly (COP) ************* ************************* 321 0000 322 copctl equ $FFFF ; COP Control Register 323 324 ;*************************************************** ********* 325 ; VECTORS 326 ;*************************************************** ********* 327 0000 328 dbg_vectors equ $FAD0 ; Debug Vectors 329 0000 330 Vectors: equ $ffd0 331 0000 332 ivadc: equ $ffd0 ; Vector for A/D conversion Complete 0000 333 ivkey: equ $ffd2 ; Vector for Keyboard 0000 334 ivsctx: equ $ffd4 ; Vector for SCI Tx 0000 335 ivscrx: equ $ffd6 ; Vector for SCI Rx 0000 336 ivscer: equ $ffd8 ; Vector for SCI Error 0000 337 equ $ffda ; Reserved 0000 338 equ $ffdc ; Reserved 0000 339 ivtb3: equ $ffde ; TIMB Channel 3 Vector 0000 340 ivtb2: equ $ffe0 ; TIMB Channel 2 Vector 0000 341 ivsptx: equ $ffe2 ; Vector for SPI Tx 0000 342 ivsprx: equ $ffe4 ; Vector for SPI Rx 0000 343 ivtbof: equ $ffe6 ; TIMB Overflow Vector 0000 344 ivtb1: equ $ffe8 ; TIMB Channel 1 Vector 0000 345 ivtb0: equ $ffea ; TIMB Channel 0 Vector 0000 346 ivtao: equ $ffec ; TIMA Overflow Vector 0000 347 ivt1c1: equ $ffee ; TIMA Channel 3 Vector 0000 348 ivta2: equ $fff0 ; TIMA Channel 2 Vector 0000 349 ivta1: equ $fff2 ; TIMA Channel 1 Vector 0000 350 ivta0: equ $fff4 ; TIMA Channel 0 Vector 0000 351 ivtof: equ $fff6 ; TIM Overflow Vector 0000 352 ivpll: equ $fff8 ; PLL Vector 0000 353 ivirq: equ $fffa ; ~IRQ1 Vector 0000 354 ivswi: equ $fffc ; SWI Vector 0000 355 ivrst: equ $fffe ; Reset Vector 356 357 template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 10 358 ;*************************************************** ********* 359 ;* Memory Map 360 ;*************************************************** ********* 361 0000 362 ram_start equ $0050 ; start of RAM 0000 363 zpage_end equ $00FF ; End of zero page ram 0000 364 extraram equ $0100 ; Start of Extra RAM 0000 365 usr_stack equ $01ff ; Bottom of user stack 0000 366 ram_last equ $023F ; last RAM location 0000 367 rom_start equ $8000 ; start of ROM 0000 368 rom_last equ $FAFF ; last ROM location ($FDFF??) 369 370 371 ;(C)opywrite P&E Microcomputer Systems, 2000 (www.pemicro.com) 372 ; You may use this code freely as long as this copyright notice 373 ; and website address is included and un-modified. 374 0000 375 include "../macros.inc" ;Macro instruction definition 376 ; -------------------------------------------------- ----------------- 377 ; Macro Definitions 378 ; -------------------------------------------------- ----------------- 379 0000 380 #macro aax macro 381 psha 382 pshx 383 add 1,sp 384 pulx 385 tax 386 bcc *+7 ; Branch to below 387 pshh 388 inc 1,sp 389 pulh 390 ; Branch to here 391 pula 0000 392 #macroend 393 0000 394 #macro inch macro 395 pshh 396 inc 1,sp 397 pulh 0000 398 #macroend 399 0000 400 #macro tha macro 401 pshh 402 pula 0000 403 #macroend template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 11 404 0000 405 #macro tah macro 406 psha 407 pulh 0000 408 #macroend 409 0000 410 #macro pshhx macro 411 pshx 412 pshh 0000 413 #macroend 414 0000 415 #macro pulhx macro 416 pulh 417 pulx 0000 418 #macroend 419 0000 420 #macro ldhxx macro 421 lda ,x 422 ldx 1,x 423 psha 424 pulh 0000 425 #macroend 426 0000 427 include "../local.inc" ;Local variables 428 ; 429 ; Conditional Assembly Directives *************** ************************* 430 ; 431 0000 432 #setnot HYPERTERM ; enable slow Hyperterminal communications 433 434 ; 435 ; Microcontroller Peripheral Equates ************ ************************* 436 ; 437 0000 438 boot_start equ $E000 ; start of protected Bootloader 0000 439 flash_protect equ {(boot_start>7)&$FF} ; Flash Block Protect Reg value 0000 440 flash_page equ 128T ; Flash Erase Page size 441 0000 442 init_config1 equ %00000011 ; initial Configurat ion Register 1 443 ; Bit_7=0 - LVISTOP - LVI disabled during stop mode 444 ; Bit_6 unused 445 ; Bit_5=0 - LVIRSTD - LVI reset enabled during run mode 446 ; Bit_4=0 - LVIPWRD - Power enabled to LVI module 447 ; Bit_3=0 - SSREC - Stop recovery after 4096 cycles 448 ; Bit_2=0 - COPRS - COP rate (2**18 - 2**4) template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 12 449 ; Bit_1=1 - STOP - Stop Instruction disabled 450 ; Bit_0=1 - COPD - COP Disabled 451 ; 0000 452 RXBLEN equ 14T ; Serial I/O Receive buffer length 0000 453 STACK_ALLOC equ 32T ; Monitor Stack Allocation 454 ; 0000 455 init_scc1 equ %01000000 ; enable SCI, 8-bits, no par, 1 stop 0000 456 init_scc2 equ %00001100 ; no interupts, rcvr and tmtr enabled 0000 457 init_scbr equ %00000011 ; set SCI for 9600 baud 458 ; 459 ; ASCII character definitions 460 0000 461 SPACE equ $20 ; ASCII space 0000 462 CR equ $0D ; ASCII carriage return 0000 463 LF equ $0A ; ASCII linefeed 0000 464 NUL equ $00 ; ASCII linefeed 0000 465 BS equ $08 ; ASCII Backspace key 0000 466 XOFF equ $13 ; ASCII X-Off key (^S or DC3) 0000 467 XON equ $11 ; ASCII X-On key (^S or DC1) 0000 468 ESC equ $1B ; ASCII Escape Character 469 470 ;--------------------------------------------------- ---- 471 ; TIMING FOR fbus = 0.407 us 472 ;the internal clock fBUS runs at 1/2.4576 ^6 = 0.407 uS. 473 ;The DBNZ instruction takes 3 cycles, which makes 1.22 uS 474 ;us5 EQU 5 ;5 * 1.22 = 6.1 uS 475 ;us10 EQU 9 ;9 * 1.22 = 10.9 uS 476 ;us30 EQU 25 ;25 * 1.22 = 30.5 uS 477 ;us100 EQU 82 ;82 * 1.22 = 100 478 ;ms1 EQU 10 ;10 * 82 * 1.22 = 1.00 mS 479 480 ;--------------------------------------------------- ----- 481 ; TIMING FOR fbus = 0.115 us 482 ;The DBNZ instruction takes 3 cycles, which makes 0.344 uS 0000 483 us1 EQU 3 ;3 * 0.344 = 1.032 uS 0000 484 us5 EQU 18 ;18 * 0.344 = 6.1 uS 0000 485 us10 EQU 32 ;32 * 0.344 = 10.9 uS 0000 486 us30 EQU 89 ;89 * 0.344 = 30.5 uS 0000 487 us50 EQU 148 ;148 * 0.344 = 51 us template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 13 0000 488 ms1 EQU 36 ;36 * 82 * 0.344 = 1.00 mS 489 0000 490 tpgs EQU us5 ;times taken from MC68HC908AB32/D rev 1 0000 491 tnvs EQU us10 0000 492 tprog EQU us30 0000 493 tnvh EQU us5 0000 494 terase EQU ms1 495 0000 496 RAMStart equ $0053 ;User App RAM is from 53 to 3FF. (HCmon RAM from 400-44F) 0000 497 EEPROM equ $800 ;EEPROM mem is 800-9FF (512 bytes) 0000 498 RomStart equ $8000 ;Flash mem is 8000 to FFFF (32 MB) 499 500 ;Port A pin usage 0000 501 LCD_e equ 3 ;LCD enable = bit 3 of porta 0000 502 LCD_rw equ 2 ;LCD read/write. 0=write, 1=read 0000 503 LCD_rs equ 1 ;LCD register select. 0=instruction, 1=data 504 505 ;Port B pin usage 0000 506 Reflect-FWD equ 2 ;Reflectometer Forward Voltage 0000 507 Reflect-REF equ 1 ;Reflectometer Reflected Voltage 0000 508 Reflect-Z equ 0 ;Reflectometer Impedance Voltage 509 510 ;Port C Usage 0000 511 Dah equ 5 ;Dah paddle input 0000 512 Dit equ 2 ;Dit paddle input 0000 513 Keyline equ 1 ;Keyline control to transmitter 0000 514 FreqCntr equ 0 ;Frequency counter input 515 516 ;Port D pin usage 0000 517 Tones equ 2 ;Tones signal to audio amp 518 519 ;Port E Usage 0000 520 Piezo equ 2 ;Piezo sounder 0000 521 RxData equ 1 ;serial port receive 0000 522 TxData equ 0 ;serial port transmit 523 524 ;PortF pin usage 0000 525 Mon_Jumper equ 7 ;Monitor jumper 0000 526 HeartbeatLED equ 6 ;Heartbeat LED 0000 527 ENC_A equ 5 ;Encoder-A pin 0000 528 ENC_B equ 4 ;Encoder-B pin 0000 529 ENC_pb equ 3 ;Encoder-Pushbutto template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 14 n pin 0000 530 DDS_load equ 2 ;DDS load pin 0000 531 DDS_clk equ 1 ;DDS clock pin 0000 532 DDS_data equ 0 ;DDS data pin 533 0053 534 org RamStart 535 0053 536 _hbufpos rmb 2 ;buffer position temp storage 537 0055 538 Timeout1 ds 1 ;Allows three timeout routines to be called each of which 0056 539 Timeout2 ds 1 ;can run for up to ~ 1/2 second. 0057 540 Timeout3 ds 1 541 0058 542 Piezo_temp ds 1 ;piezo temp variable 543 0059 544 Enc_tens ds 1 ;encoder display digit (tens) 005A 545 Enc_units ds 1 ;encoder display digit (ones) 546 005B 547 LCD_timer ds 1 ;counter for timeout check in LCD busy_check 005C 548 LCD_read ds 1 ;temp store for status read in LCD busy_check 005D 549 LCD_char ds 1 ;temp for LCD data written (cmnd2LCD & data2LCD) 005E 550 temp1 ds 1 ;temp store used in write_LCD 005F 551 temp2 ds 1 552 0060 553 temp ds 1 ;temp used in EEPROM driver 554 0061 555 enc_new ds 1 ;new reading of encoder 0062 556 enc_old ds 1 ;last reading of encoder 0063 557 enc_temp ds 1 ;temp location for encoder bits 0064 558 A_flag ds 1 ;enc line A hi/lo status 0065 559 B_flag ds 1 ;enc line B hi/lo status 560 0066 561 a2d_last ds 1 ;previous A/D reading 0067 562 a2d_lasta ds 1 ;previous A/D reading + 1 0068 563 a2d_lastb ds 1 ;previous A/D reading - 1 564 0069 565 bit_count ds 1 ;DDS bit counter 006A 566 byte_count ds 1 ;DDS byte counter 006B 567 byte2send ds 1 ;DDS byte to send template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 15 006C 568 DDS_w4 ds 1 ;DDS programming register W4 (freq-b7 ... freq-b0) 006D 569 DDS_w3 ds 1 ;DDS programming register W3 (freq-b15 ... freq-b8) 006E 570 DDS_w2 ds 1 ;DDS programming register W2 (freq-b23 ... freq-b16) 006F 571 DDS_w1 ds 1 ;DDS programming register W1 (freq-b31 ... freq-b24) 0070 572 DDS_w0 ds 1 ;DDS programming register W0 (phase-b4 ... control-0) 573 0071 574 count_lo ds 1 0072 575 count_hi ds 1 0073 576 to_addr ds 2 ;index pointer storage locs 0075 577 from_addr ds 2 578 0077 579 EEbyte_count ds 1 ;EEPROM byte counter 0078 580 EEline_count ds 1 ;EEPROM line counter 581 040A 582 org $040A ;common "_inbuf" buffer with HCmon 040A 583 _inbuf rmb RXBLEN ;Input Buffer 584 8000 585 org RomStart 586 587 ;*************************************************** *********************** 588 ; Vector Jump Table (located at start of User Area = 8000) 589 ;*************************************************** *********************** 590 8000 [03] CC816D 591 _user_adc jmp Dummy_ISR ; Insert jump to ADC vector code 8003 [03] CC816D 592 _user_keyboard jmp Dummy_ISR ; Insert jump to Keyboard vector code 8006 [03] CC816D 593 _user_scitx jmp Dummy_ISR ; Insert jump to SCI transmit vector code 8009 [03] CC816D 594 _user_scirx jmp Dummy_ISR ; Insert jump to SCI receive vector code 800C [03] CC816D 595 _user_scierr jmp Dummy_ISR ; Insert jump to SCI error vector code 800F [03] CC816D 596 _user_timbch3 jmp Dummy_ISR ; Insert jump to TIMB Channel 3 Vector code 8012 [03] CC816D 597 _user_timbch2 jmp Dummy_ISR ; Insert jump to TIMB Channel 2 Vector code 8015 [03] CC816D 598 _user_spitx jmp Dummy_ISR ; Insert jump to SPI transmit vector code 8018 [03] CC816D 599 _user_spirx jmp Dummy_ISR ; Insert jump to SPI receive vector code 801B [03] CC816D 600 _user_timb_of jmp Dummy_ISR ; Insert jump to TIMB Overflow Vector code 801E [03] CC816D 601 _user_timb_ch1 jmp Dummy_ISR ; Insert jump to TIMB Channel 1 Vector code 8021 [03] CC816D 602 _user_timb_ch0 jmp Dummy_ISR ; Insert template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 16 jump to TIMB Channel 0 Vector code 8024 [03] CC816D 603 _user_tima_of jmp Dummy_ISR ; Insert jump to TIMA Overflow Vector code 8027 [03] CC816D 604 _user_tima_ch3 jmp Dummy_ISR ; Insert jump to TIMA Channel 3 Vector code 802A [03] CC816D 605 _user_tima_ch2 jmp Dummy_ISR ; Insert jump to TIMA Channel 2 Vector code 802D [03] CC8128 606 _user_tima_ch1 jmp T_ISR ; Insert jump to TIMA Channel 1 Vector code 8030 [03] CC816D 607 _user_tima_ch0 jmp Dummy_ISR ; Insert jump to TIMA Channel 0 Vector code 8033 [03] CC816D 608 _user_tim_of jmp Dummy_ISR ; Insert jump to TIM Overflow Vector code 8036 [03] CC816D 609 _user_pll jmp Dummy_ISR ; Insert jump to PLL Vector code 8039 [03] CC816D 610 _user_irq jmp Dummy_ISR ; Insert jump to ~IRQ1 Vector code 611 803C [03] CC807C 612 _HCmon_LCD_disp jmp HCmon_LCD_disp ; vector (at $803C) for HCmon 613 ; to display message to LCD 614 615 ;*************************************************** *********************** 616 ;********************** USER APP ENTRY POINT ********************* 617 ;*************************************************** *********************** 618 ; This is the point ($8040) where User Code starts executing * 619 ; after coming from the Monitor "X" command (eXecute User App) * 620 ; or after board gets a RESET (when Monitor jumper is off) * 621 ;*************************************************** *********************** 622 8040 623 org $8040 624 625 Start: 8040 [02] 9B 626 sei ;disable all interrupts 8041 [03] 4501FF 627 ldhx #$01FF ;initialize 8044 [02] 94 628 txs ; the stack pointer (why not 3FF?) 8045 [04] 6EFF04 629 mov #$FF,ddra ;set porta as outputs 8048 [04] 6E020C 630 mov #$02,ddre ;set port E2 as output 631 804B [03] B609 632 lda portf ;get initial encoder position 804D [02] A430 633 and #$30 ;isolate the encoder bits 804F [03] B762 634 sta enc_old ;initialize encoder old value 635 template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 17 8051 [05] CD8118 636 jsr Init_Timer 8054 [03] 3F55 637 clr timeout1 ;init timeouts (0=off) 8056 [03] 3F56 638 clr timeout2 8058 [03] 3F57 639 clr timeout3 805A [02] 9A 640 cli ;allow interrupts to happen 641 642 ;*************************************************** *********************** 643 ;***************** USER APPPLICATION MAINLINE ******************* 644 ;*************************************************** *********************** 645 646 User_Main: 805B [04] 6E0355 647 mov #3,timeout1 ;Start an A/D conversion in 3*2ms=6ms 805E [03] 458069 648 ldhx #TemplateBanner_msg 8061 [05] CD846D 649 jsr _puts ;print Exerciser Banner message 650 651 Main_Loop: 8064 [04] C7FFFF 652 sta copctl ;clear the COP counter 8067 [03] 20FB 653 bra Main_Loop 654 8069 54656D70 655 TemplateBanner_msg: fcb 'Template Program',CR,LF ,0 6C617465 2050726F 6772616D 0D0A00 656 657 658 659 660 ;*************************************************** *********************** 661 ;*************** HCmon_LCD_disp ******************************* 662 ;* Routine called from HCmon to display message to LCD * 663 ;*************************************************** *********************** 664 665 HCmon_LCD_disp: 807C [05] CD8280 666 jsr LCD_init 807F [05] CD82DB 667 jsr LCD_clear 8082 [03] 458094 668 ldhx #mon_msg1 8085 [05] CD833C 669 jsr disp_msg 8088 [02] A6C0 670 lda #$C0 808A [05] CD8201 671 jsr cmnd2lcd 808D [03] 4580A3 672 ldhx #mon_msg2 8090 [05] CD833C 673 jsr disp_msg 8093 [04] 81 674 rts 675 676 mon_msg1: template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 18 8094 48436D6F 677 fcb 'HCmonitor v1.0',0 6E69746F 72207631 2E3000 678 679 mon_msg2: 80A3 472E4865 680 fcb 'G.Heron N2APB',0 726F6E20 4E324150 4200 681 682 template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 19 80B1 683 $page 684 ;*************************************************** *********************** 685 ;***************** DELAY ROUTINES ******************************* 686 ;*************************************************** *********************** 687 688 ;--------------------------------------------------- ----------------------- 689 ; Delay -- This subroutine performs a simple software delay loop based upon 690 ; the value passed in ACC. The following timing calculation applies: 691 ; delay = ((ACC * 74) + 12) (tcyc) 692 693 delay: 80B1 [02] 87 694 psha ;[2] save delay parameter temporarily 695 delay1: 80B2 [02] A616 696 lda #22T ;[2] initialize 5us loop counter 697 ; (repeat for timing) 698 delay2: 80B4 [03] 4BFE 699 dbnza delay2 ;[3] decrement inner delay loop counter 80B6 [06] 9E6B01F8 700 dbnz 1,sp,delay1 ;[6] decrement outer delay loop counter 80BA [02] 86 701 pula ;[2] deallocate local variable 80BB [04] 81 702 rts ;[4] return 703 704 ;--------------------------------------------------- ----------------------- 705 ; Wait500ms -- Waits here for (10 x 50 x 1ms) = 500ms 706 707 wait500ms: 80BC [02] A60A 708 lda #10 80BE [03] B772 709 sta count_hi 80C0 [02] A650 710 w500m1: lda #$50 80C2 [03] B771 711 sta count_lo 80C4 [05] CD8103 712 w500m2: jsr wait1ms 80C7 [05] 3B71FA 713 dbnz count_lo,w500m2 80CA [05] 3B72F3 714 dbnz count_hi,w500m1 80CD [04] 81 715 rts 716 717 ;--------------------------------------------------- ----------------------- 718 ; Wait100ms-- Waits here for 100ms 719 720 wait100ms: 80CE [02] A664 721 lda #100 80D0 [02] 87 722 w100a: psha 80D1 [04] AD30 723 bsr wait1ms 80D3 [02] 86 724 pula template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 20 80D4 [03] 4BFA 725 dbnza w100a 80D6 [04] 81 726 rts 727 728 ;--------------------------------------------------- ----------------------- 729 ; Wait64ms-- Waits here for 64ms 730 731 wait64ms: 80D7 [02] A640 732 lda #64 80D9 [02] 87 733 w64a: psha 80DA [04] AD27 734 bsr wait1ms 80DC [02] 86 735 pula 80DD [03] 4BFA 736 dbnza w64a 80DF [04] 81 737 rts 738 739 ;--------------------------------------------------- ----------------------- 740 ; Wait50ms-- Waits here for 50ms 741 742 wait50ms: 80E0 [04] 6E1055 743 mov #16,timeout1 80E3 [03] 3D55 744 w50a: tst timeout1 80E5 [03] 26FC 745 bne w50a 80E7 [04] 81 746 rts 747 748 ;--------------------------------------------------- ----------------------- 749 ; Wait32ms-- Waits here for 32ms 750 751 wait32ms: 80E8 [02] A620 752 lda #32 80EA [02] 87 753 w32a: psha 80EB [04] AD16 754 bsr wait1ms 80ED [02] 86 755 pula 80EE [03] 4BFA 756 dbnza w32a 80F0 [04] 81 757 rts 758 759 ;--------------------------------------------------- ----------------------- 760 ; Wait64ms-- Waits here for 16ms 761 762 wait16ms: 80F1 [02] A610 763 lda #16 80F3 [02] 87 764 w16a: psha 80F4 [04] AD0D 765 bsr wait1ms 80F6 [02] 86 766 pula 80F7 [03] 4BFA 767 dbnza w16a 80F9 [04] 81 768 rts 769 770 ;--------------------------------------------------- ----------------------- 771 ; Wait10ms-- Waits here for 10ms 772 773 Wait10ms: 80FA [02] A60A 774 lda #10 80FC [02] 87 775 w10a: psha 80FD [04] AD04 776 bsr wait1ms 80FF [02] 86 777 pula template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 21 8100 [03] 4BFA 778 dbnza w10a 8102 [04] 81 779 rts 780 781 ;--------------------------------------------------- ----------------------- 782 ; Wait1ms-- Waits here for 1ms 783 784 wait1ms: 8103 [02] A60A 785 lda #10 8105 [02] 87 786 w1msa: psha 8106 [04] AD04 787 bsr wait100us 8108 [02] 86 788 pula 8109 [03] 4BFA 789 dbnza w1msa 810B [04] 81 790 rts 791 792 ;--------------------------------------------------- ----------------------- 793 ; Wait100us -- Waits here for 100us 794 ; 1 cycle = .11454545 US 795 ; (137 x (5 x .11454545)) + (6 x .11454545) 796 ; (174 x .5727) + .687 = 100 us 797 798 wait100us: 810C [02] A6AE 799 lda #174 ; [2] 810E [01] 4A 800 w100u: deca ; [1] 810F [01] 9D 801 nop ; [1] 8110 [03] 26FC 802 bne w100u ; [3] 8112 [04] 81 803 rts ; [4] 804 805 ;--------------------------------------------------- ----------------------- 806 ; Wait1us -- Waits here for 1us 807 808 wait1us: 8113 [03] B603 809 lda us1 8115 [03] 4BFE 810 dbnza * 8117 [04] 81 811 rts 812 813 814 ;*************************************************** ********** 815 ;***************** TIMER MODULE ************* ********** 816 ;*************************************************** ********** 817 818 ;--------------------------------------------------- ---------- 819 ; Init_Timer - Turns on timer A channel 1 for an Output 820 ; Compare in approximately 2ms. Creates an interrupt 821 ; vector to the Timer ISR (T_ISR), where Timeout1, 822 ; Timeout2 and Timeout3 are decremeted. If a timer 823 ; reaches 0, then a user-specified template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 22 operation is 824 ; done. Thus, the user can either set a timer in his 825 ; code and sit there waiting on it to become 0, or 826 ; he may place the timeout action routine right here 827 ; in the Timer Handlers. We use the latter technique 828 ; for the "heartbeat" LED blink. We set Timeout1 to 829 ; FF in the Timer1 Handler below, and when 256 ticks 830 ; of the 2ms timer interrupt occur, we toggle the state 831 ; of the heartbeat LED and reset Timeout1 to occur again 832 ; in another 256 ticks. 833 834 835 Init_Timer: 8118 [04] 6E3620 836 mov #$36,TASC ; Timer A - Cleared + Stopped. 837 ; Clicks once every 64 BUS Cycles 838 ; 77t Clicks ~ 2ms 839 811B [04] 6E002A 840 mov #$0,TACH1H ; Set Output Compare to happen 77T clicks 811E [04] 6E4D2B 841 mov #77T,TACH1L ; after we start the timer. (~2ms). The 842 ; timer interrupt will set OC for another ~2ms. 843 8121 [04] 6E5429 844 mov #$54,TASC1 ; Timer A Channel 1 845 ; Set for Output Compare operation. 846 8124 [04] 6E0620 847 mov #$06,TASC ; Start the timer 8127 [04] 81 848 rts 849 850 851 **************************************************** ********** 852 * T_ISR - Timer Interrupt Service Routine. * 853 * after a RESET. * 854 **************************************************** ********** 855 T_ISR: 8128 [02] 8B 856 pshh 8129 [02] 89 857 pshx 812A [02] 87 858 psha 812B [03] B629 859 lda tasc1 812D [02] A47F 860 and #$7f 812F [03] B729 861 sta tasc1 ; Clear O.C. Flag 8131 [04] 552A 862 ldhx tach1h template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 23 8133 [02] AF4D 863 aix #77T ; Setup another interrupt in ~2ms 8135 [04] 352A 864 sthx tach1h 865 866 Check_t1: 8137 [03] 3D55 867 tst timeout1 8139 [03] 2707 868 beq check_t2 ; Is Timeout 1 currently active? 813B [04] 3A55 869 dec timeout1 ; yes 813D [03] 2603 870 bne check_t2 ; Did it just finish counting down? 813F [05] CD815C 871 jsr t1_handler ; Yes - Execute Timeout 1 handler 872 873 Check_t2: 8142 [03] 3D56 874 tst timeout2 8144 [03] 2707 875 beq check_t3 ; Is Timeout 2 currently active? 8146 [04] 3A56 876 dec timeout2 ; yes 8148 [03] 2603 877 bne check_t3 ; Did it just finish counting down? 814A [05] CD8169 878 jsr t2_handler ; Yes - Execute Timeout 2 handler 879 880 Check_t3: 814D [03] 3D57 881 tst timeout3 814F [03] 2707 882 beq done_tisr ; Is Timeout 3 currently active? 8151 [04] 3A57 883 dec timeout3 ; yes 8153 [03] 2603 884 bne done_tisr ; Did it just finish counting down? 8155 [05] CD816B 885 jsr t3_handler ; Yes - Execute Timeout 3 handler 886 887 done_tisr: 8158 [02] 86 888 pula 8159 [02] 88 889 pulx 815A [02] 8A 890 pulh 815B [07] 80 891 rti 892 893 **************************************************** ************ 894 * Timeout Handlers - All the user has to do is set one of the * 895 * timeout variables to any number n (1-255) * 896 * and the timeout handler will be executed * 897 * in 2*n milliseconds. Setting the timeout * 898 * variable from within the handler will * 899 * cause a periodic timeout as shown in * 900 * timeout 1. * 901 **************************************************** ************ template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 24 902 t1_handler: 815C [02] A6FF 903 lda #$FF 815E [03] B755 904 sta timeout1 8160 [05] 0D0903 905 brclr 6,portF,t1a ;toggle heartbeat LED 8163 [04] 1D09 906 bclr 6,portF 8165 [04] 81 907 rts 8166 [04] 1C09 908 t1a: bset 6,portF 8168 [04] 81 909 rts 910 911 t2_handler: 8169 [01] 9D 912 nop 816A [04] 81 913 rts 914 915 t3_handler: 816B [01] 9D 916 nop 816C [04] 81 917 rts 918 919 **************************************************** ********** 920 * DUMMY_ISR - Dummy Interrupt Service Routine. * 921 * Just does a return from interrupt. * 922 **************************************************** ********** 923 dummy_isr: 816D [01] 9D 924 nop 816E [07] 80 925 rti ; return 926 927 **************************************************** ********** 928 * UTILS - Utilities and routines shared from HCmon * 929 **************************************************** ********** 930 816F 931 include "../drivers.s" ;drivers for Shaft Enc, LCD, EEPROM, DDS template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 25 816F 931 $page 932 ;*************************************************** ************************** 933 ;***************** DDS DRIVER ********************************* 934 ;*************************************************** ************************** 935 ;*************************************************** ************************** 936 ;*************************************************** ************************** 937 ;* * 938 ;* DRIVER MODULE * 939 ;* * 940 ;*************************************************** ************************** 941 ;*************************************************** ************************** 942 ; 943 ; This module contains drivers for the following components: 944 ; DDS 945 ; Set_DDS 946 ; Shaft Encoders (Special and Grey) 947 ; Do_Special_Encoder 948 ; Do_Grey_Encoder 949 ; LCD 950 ; Cmnd2LCD 951 ; Data2LCD 952 ; BusyCheck 953 ; LCD_Init 954 ; LCD_Clear 955 ; ClearLCDLine1 956 ; ClearLCDLine2 957 ; BlankLCD 958 ; UnBlankLCD 959 ; ShowCursor 960 ; HideCursor 961 ; Disp_Msg 962 ; EEPROM 963 ; Write_EEPROM_Byte 964 ; Erase_EEPROM_All 965 ; Erase_EEPROM_Byte 966 ; Init_EEPROM 967 ; EEPROM_On 968 ; EEPROM_Off 969 ; EEPROM_Security_On 970 ; EEPROM_Security_Off 971 ; EEPROM_Disable 972 ; EEPROM_Enable 973 ; 974 ;*************************************************** ************************** 975 976 template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 26 977 ;*************************************************** ************************** 978 ; Set_DDS - This routine sends the 5-byte DDS control word (DDS_w4 through 979 ; DDS_w0, LSB to MSB in each) to the DDS chip by serial data transfer. 980 981 Set_dds: 816F [03] 45006C 982 ldhx #DDS_w4 ;point to the start of the DDS programming words 8172 [04] 6E056A 983 mov #$05,byte_count ;we'll process 5 bytes 984 8175 [04] 7E6B 985 nxtbyt: mov X+,byte2send ;get the DDS word (and increment pointer H:X) 8177 [04] 6E0869 986 mov #$08,bit_count ;we'll process 8 bits 987 817A [04] 366B 988 nxtbit: ror byte2send ;test next LSB for 0 or 1 817C [03] 2408 989 bcc send0 ;send a 0 if carry clear 990 817E [04] 1009 991 send1: bset DDS_data,portf ;else send a one 8180 [04] 1209 992 bset DDS_clk,portf ;Toggle write clock 8182 [04] 1309 993 bclr DDS_clk,portf 8184 [03] 2006 994 bra check 995 8186 [04] 1109 996 send0: bclr DDS_data,portf ;Send zero 8188 [04] 1209 997 bset DDS_clk,portf ;Toggle write clock 818A [04] 1309 998 bclr DDS_clk,portf 999 818C [05] 3B69EB 1000 check: dbnz bit_count,nxtbit ;get next DDS programming bit if not done 818F [05] 3B6AE3 1001 dbnz byte_count,nxtbyt ;get next DDS programming byte if not done 1002 8192 [04] 1409 1003 bset DDS_load,portf ;else done - send DDS load signal 8194 [04] 1509 1004 bclr DDS_load,portf 8196 [04] 81 1005 rts 1006 1007 template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 27 8197 1008 $page 1009 ;*************************************************** ************************** 1010 ;************** SHAFT ENCODER DRIVER ********************************* 1011 ;*************************************************** ************************** 1012 1013 ;*************************************************** ************************** 1014 ; Read Special Encoder - Wait here for shaft to turn. Exit with 1015 ; Z=0 if CCW 1016 ; Z=1 if CW 1017 ;*************************************************** ************************** 1018 ; + + 1019 ; ---- + --+- ---- 1020 ; A | + | + | | | 1021 ; | + | + | | | 1022 ; -+-- + ---- 1023 ; + + 1024 ; ---+ +--- ---- 1025 ; B +| |+ | | 1026 ; +| |+ | | 1027 ; + --- + ---- 1028 ; + + 1029 ;*************************************************** ************************** 1030 ;Await negative transition on either A or B shaft encoder line 1031 1032 Do_Special_Encoder: 8197 [05] 0A0908 1033 brset ENC_A,portF,de1 ;A still high, go check B 819A [03] 3D64 1034 tst A_flag ;A is low ... previously low too? 819C [03] 2707 1035 beq de2 ;yes, previously low so not neg-edge. Check B next. 819E [03] 3F64 1036 clr A_flag ;neg edge A found! Set flag to indicate it's now low 81A0 [03] 2011 1037 bra de4 ;and go process rotation 1038 81A2 [04] 6EFF64 1039 de1: mov #$FF,A_flag ;set A flag to indicate that it's (still) high 1040 81A5 [05] 090905 1041 de2: brclr ENC_B,portF,de3 ;B is low ... continue checking it 81A8 [04] 6EFF65 1042 mov #$FF,B_flag ;B is high, so set flag indicating this 81AB [03] 20EA 1043 bra do_special_encoder ;and do all again 81AD [03] 3D65 1044 de3: tst B_flag ;B previously low? 81AF [03] 27E6 1045 beq do_special_encoder ;yes, nothing to process, so do all over again template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 28 81B1 [03] 3F65 1046 clr B_flag ;neg edge B found! Set flag indicate it's now low 1047 ;and continue onward to process direction 1048 1049 ;negative edge found on A or B. Determine which direction shaft was turned. 1050 ; Direction = CW if B toggled 1051 ; Direction = CCW if A toggled 1052 81B3 [05] 4E6162 1053 de4: mov enc_new,enc_old 81B6 [03] B609 1054 lda portF 81B8 [02] A430 1055 and #$30 81BA [03] B761 1056 sta enc_new 81BC [03] B862 1057 eor enc_old 81BE [02] A410 1058 and #$10 ;z=1 ==> A toggled = CCW rotation = down 1059 ;z=0 ==> B toggled = CW rotation = up 81C0 [04] 81 1060 rts 1061 1062 ;*************************************************** *********************** 1063 ; Process Grey Code Encoder - Wait here for shaft to turn. Exit with 1064 ; Z=0 if CCW 1065 ; Z=1 if CW 1066 ;*************************************************** *********************** 1067 1068 Do_Grey_Encoder: 81C1 [05] CD81DD 1069 jsr read_encoder 81C4 [03] B75F 1070 sta temp2 ;buffer the input 81C6 [03] B65F 1071 lda temp2 81C8 [02] A430 1072 and #$30 ;isolate the encoder bits 81CA [03] B761 1073 sta enc_new 81CC [03] B862 1074 eor enc_old 81CE [03] 27F1 1075 beq Do_Grey_Encoder ;no change, wait in encoder loop 1076 81D0 [04] 1762 1077 bclr 3,enc_old ;change detected ... which way? 81D2 [03] B662 1078 lda enc_old 81D4 [01] 49 1079 rola 81D5 [03] B861 1080 eor enc_new 81D7 [02] A410 1081 and #$10 ;b5 changed 81D9 [05] 4E6162 1082 mov enc_new,enc_old ;update new/old bits 81DC [04] 81 1083 rts 1084 1085 ;--------------------------------------------------- -------- 1086 ; Read Grey Code Shaft Encoder -- returns contents of portF 1087 ; To deal with contact bounce on shaft encoder bits, template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 29 1088 ; 3 successive readings must be identical before returning 1089 1090 Read_Encoder: 81DD [05] 4E0963 1091 mov portF,enc_temp ;make initial reading 81E0 [05] CD8103 1092 jsr wait1ms 81E3 [03] B609 1093 lda portF ;make first check 81E5 [03] B063 1094 sub enc_temp 81E7 [03] 26F4 1095 bne Read_Encoder ;if not the same, try again 1096 81E9 [05] CD8103 1097 jsr wait1ms 81EC [03] B609 1098 lda portF ;make 2nd check 81EE [03] B063 1099 sub enc_temp 81F0 [03] 26EB 1100 bne Read_Encoder ;if not the same as 1st, try again 1101 81F2 [03] B663 1102 lda enc_temp 81F4 [04] 81 1103 rts 1104 81F5 [05] CD8103 1105 jsr wait1ms 81F8 [03] B609 1106 lda portF ;make 3rd check 81FA [03] B063 1107 sub enc_temp 81FC [03] 26DF 1108 bne Read_Encoder ;if not the same as 2nd, try again 81FE [03] B663 1109 lda enc_temp 8200 [04] 81 1110 rts 1111 template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 30 8201 1112 $page 1113 ;*************************************************** *********************** 1114 ;******************* LCD Driver ********** *********************** 1115 ;*************************************************** *********************** 1116 1117 ;--------------------------------------------------- --------- 1118 ;Display character in A to the LCD. LCD_rw and LCD_rs must be 1119 ;set up prior to entry. 1120 1121 Cmnd2LCD: 8201 [03] B75D 1122 sta LCD_char ;temp save char to be written 8203 [04] 1300 1123 bclr LCD_rs,porta ;rs is low for cmnd 8205 [05] CD8252 1124 jsr busy_check ;LCD ready for new data? 8208 [03] 3F00 1125 clr porta 820A [04] 6EFF04 1126 mov #$FF,ddra ;setup for all outputs 820D [04] 1500 1127 bclr LCD_rw,porta ;change LCD back to Write mode 820F [04] 1300 1128 bclr LCD_rs,porta ;ensure that rs is low for cmnd 8211 [03] 2010 1129 bra write_LCD ;continue 1130 Data2LCD: 8213 [03] B75D 1131 sta LCD_char ;temp save char to be written 8215 [04] 1200 1132 bset LCD_rs,porta ;rs is hi for data 8217 [05] CD8252 1133 jsr busy_check ;LCD ready for new data? 821A [03] 3F00 1134 clr porta 821C [04] 6EFF04 1135 mov #$FF,ddra ;setup for all outputs 821F [04] 1500 1136 bclr LCD_rw,porta ;change LCD back to Write mode 8221 [04] 1200 1137 bset LCD_rs,porta ;ensure that rs is hi for data 1138 Write_LCD: 8223 [03] B65D 1139 lda LCD_char ;get the character 8225 [02] A4F0 1140 and #$F0 ;deal with hi nibble 8227 [03] B75E 1141 sta temp1 8229 [03] B600 1142 lda porta ;get porta image 822B [02] A40F 1143 and #$0F ;clear the data nibble 822D [03] BA5E 1144 ora temp1 ;combine with character hi nibble 822F [03] B700 1145 sta porta 8231 [04] 1600 1146 bset LCD_e,porta ;strobe enable 8233 [05] CD8113 1147 jsr wait1us 8236 [04] 1700 1148 bclr LCD_e,porta 1149 8238 [03] B65D 1150 lda LCD_char ;get character back again template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 31 823A [03] 62 1151 nsa ;get low nibble hi 823B [02] A4F0 1152 and #$F0 823D [03] B75E 1153 sta temp1 823F [03] B600 1154 lda porta 8241 [02] A40F 1155 and #$0F 8243 [03] BA5E 1156 ora temp1 8245 [03] B700 1157 sta porta 8247 [05] CD8113 1158 jsr wait1us 824A [04] 1600 1159 bset LCD_e,porta 824C [05] CD8113 1160 jsr wait1us 824F [04] 1700 1161 bclr LCD_e,porta 8251 [04] 81 1162 rts 1163 1164 ;--------------------------------------------------- -- 1165 ;Busy_check Subroutine 1166 ; 1167 ;LCD read/write operations are slooooow, this subroutine 1168 ;polls the LCD busy flag to determine if previous operations are completed. 1169 1170 Busy_Check: 8252 [01] 4F 1171 clra 8253 [04] 6E0F04 1172 mov #$0F,ddra ;tristate the data pins 8256 [04] 1300 1173 bclr LCD_rs,porta ;set up to read busy flag 8258 [04] 1400 1174 bset LCD_rw,porta ;set up for Read 825A [05] CD8113 1175 jsr wait1us 825D [04] 6EFF5B 1176 mov #$FF,LCD_timer ;init timeout counter 8260 [04] 1600 1177 busy: bset LCD_e,porta ;raise the Enable bit 8262 [05] CD8113 1178 jsr wait1us 8265 [05] 4E005C 1179 mov porta,LCD_read ;read the byte 8268 [04] 1700 1180 bclr LCD_e,porta 826A [05] CD8113 1181 jsr wait1us 826D [04] 1600 1182 bset LCD_e,porta ;get next nibble to keep LCD happy 826F [05] CD8113 1183 jsr wait1us 8272 [04] 1700 1184 bclr LCD_e,porta 8274 [05] CD8113 1185 jsr wait1us 8277 [05] 3B5B02 1186 dbnz LCD_timer,busy2 ;timer not zero 827A [03] 2003 1187 bra not_busy ;timer=0 so exit anyway 827C [05] 0E5CE1 1188 busy2: brset 7,LCD_read,busy ;check for busy flag - wait if set 1189 1190 not_busy: 827F [04] 81 1191 rts 1192 1193 ;--------------------------------------------------- -------- 1194 ; LCD_INIT 1195 ; Power on initialization of LCD. 1196 ; The LCD controller chip must be equivalent to an Hitachi 44780. template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 32 1197 1198 LCD_Init: 8280 [05] CD80CE 1199 jsr Wait100ms 1200 8283 [04] 6E3000 1201 mov #$30,porta ;func set 8286 [04] 1600 1202 bset LCD_e,porta 8288 [05] CD80D7 1203 jsr Wait64ms 828B [04] 1700 1204 bclr LCD_e,porta 828D [05] CD8113 1205 jsr Wait1us 1206 8290 [04] 1600 1207 bset LCD_e,porta 8292 [05] CD8113 1208 jsr Wait1us 8295 [04] 6E3000 1209 mov #$30,porta ;func set 8298 [04] 1600 1210 bset LCD_e,porta 829A [05] CD80E8 1211 jsr Wait32ms 829D [04] 1700 1212 bclr LCD_e,porta 829F [05] CD8113 1213 jsr Wait1us 1214 82A2 [04] 1600 1215 bset LCD_e,porta 82A4 [05] CD8113 1216 jsr Wait1us 82A7 [04] 6E3000 1217 mov #$30,porta ;func set 82AA [04] 1600 1218 bset LCD_e,porta 82AC [05] CD80E8 1219 jsr Wait32ms 82AF [04] 1700 1220 bclr LCD_e,porta 82B1 [05] CD8113 1221 jsr Wait1us 1222 82B4 [04] 6E2000 1223 mov #$20,porta ;set 4-bit mode 82B7 [04] 1600 1224 bset LCD_e,porta 82B9 [05] CD80F1 1225 jsr Wait16ms 82BC [04] 1700 1226 bclr LCD_e,porta 82BE [05] CD8113 1227 jsr Wait1us 1228 82C1 [02] A628 1229 lda #$28 ;1/16 duty cycle, 5x8 matrix 82C3 [05] CD8201 1230 jsr cmnd2LCD 1231 82C6 [02] A608 1232 lda #$08 ;disp off, curs & blank off 82C8 [05] CD8201 1233 jsr cmnd2LCD 1234 82CB [02] A601 1235 lda #$01 ;clear & reset cursor 82CD [05] CD8201 1236 jsr cmnd2LCD 1237 82D0 [02] A606 1238 lda #$06 ;cursor moves right, no shift 82D2 [05] CD8201 1239 jsr cmnd2LCD 1240 82D5 [02] A60C 1241 lda #$0C ;display on, cursor & blink off 82D7 [05] CD8201 1242 jsr cmnd2LCD 1243 82DA [04] 81 1244 rts 1245 1246 ;--------------------------------------------------- -------- 1247 ; LCD_clear -- clears the LCD display template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 33 1248 1249 LCD_Clear: 82DB [02] A601 1250 lda #$01 82DD [05] CD8201 1251 jsr cmnd2LCD 82E0 [04] 81 1252 rts 1253 1254 ;--------------------------------------------------- -------- 1255 ; ClearLCDLine1 -- point to 1st char on Line 1, clear line, leave cursor at position 1 1256 1257 ClearLCDLine1: 82E1 [02] A680 1258 lda #$80 ;point to 1st char line 1 82E3 [05] CD8201 1259 jsr Cmnd2LCD 82E6 [05] CD8103 1260 jsr wait1ms 82E9 [03] 4582F5 1261 ldhx #_blank_line 82EC [05] CD833C 1262 jsr disp_msg 82EF [02] A680 1263 lda #$80 ;leave cursor at home on line 1 82F1 [05] CD8201 1264 jsr Cmnd2LCD 82F4 [04] 81 1265 rts 1266 82F5 20202020 1267 _blank_line fcb " ",0 20202020 20202020 20202020 20202020 00 1268 1269 ;--------------------------------------------------- -------- 1270 ; ClearLCDLine2 -- point to 1st char on Line 2, clear line, leave cursor at position 1 1271 1272 ClearLCDLine2: 830A [02] A6C0 1273 lda #$C0 ;point to 1st char line 2 830C [05] CD8201 1274 jsr Cmnd2LCD 830F [05] CD8103 1275 jsr wait1ms 8312 [03] 4582F5 1276 ldhx #_blank_line 8315 [05] CD833C 1277 jsr disp_msg 8318 [02] A6C0 1278 lda #$C0 ;leave cursor at home on line 1 831A [05] CD8201 1279 jsr Cmnd2LCD 831D [04] 81 1280 rts 1281 1282 ;--------------------------------------------------- -------- 1283 ; BlankLCD 1284 1285 BlankLCD: 831E [02] A608 1286 lda #8 ;Blank the LCD 8320 [05] CD8201 1287 jsr Cmnd2LCD 8323 [04] 81 1288 rts 1289 1290 ;--------------------------------------------------- -------- template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 34 1291 ; UnBlankLCD 1292 1293 UnBlankLCD: 8324 [02] A60C 1294 lda #12 ;UnBlank the LCD 8326 [05] CD8201 1295 jsr Cmnd2LCD 8329 [04] 81 1296 rts 1297 1298 ;--------------------------------------------------- -------- 1299 ; ShowCursor -- produce a blinking cursor 1300 1301 ShowCursor: 832A [02] A60F 1302 lda #15 ;Show Cursor (blinking) 832C [05] CD8201 1303 jsr Cmnd2LCD 832F [05] CD8103 1304 jsr wait1ms 8332 [04] 81 1305 rts 1306 1307 ;--------------------------------------------------- -------- 1308 ; HideCursor 1309 1310 HideCursor: 8333 [02] A60C 1311 lda #12 ;Hide Cursor 8335 [04] C68201 1312 lda Cmnd2LCD 8338 [05] CD8103 1313 jsr wait1ms 833B [04] 81 1314 rts 1315 1316 ;--------------------------------------------------- -------- 1317 ; DISP_MSG -- displays the message pointed to by H:X 1318 1319 Disp_Msg: 833C [02] F6 1320 lda ,x 833D [03] 2706 1321 beq disp_msg_end ;zero ends the string 833F [05] CD8213 1322 jsr data2LCD 8342 [01] 5C 1323 incx 8343 [03] 20F7 1324 bra disp_msg 1325 1326 disp_msg_end: 8345 [04] 81 1327 rts 1328 template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 35 8346 1329 $page 1330 ;*************************************************** *********************** 1331 ;******************* EEPROM Driver ****************************** 1332 ;*************************************************** *********************** 1333 ; 1334 ;--------------------------------------------------- ----------------------- 1335 ; Write_EEPROM_Byte -- The target EEPROM address H:X (in the range 800-9FF) 1336 ; is first erased, then written with the byte supplied 1337 ; in reg A. 1338 1339 Write_EEPROM_Byte: 8346 [02] 87 1340 psha ;save the data to be written 8347 [05] CD8388 1341 jsr Erase_EEPROM_Byte ;erase the target location 834A [02] A618 1342 lda #(EERAS1|EERAS0) 834C [01] 43 1343 coma ;clear EERAS1 & EERAS0 in EECR 834D [04] C4FE1D 1344 and EECR 8350 [04] C7FE1D 1345 sta EECR 8353 [02] AA04 1346 ora #EELAT ;set EELAT in EECR 8355 [04] C7FE1D 1347 sta EECR 8358 [02] 86 1348 pula ;and retrieve the data 8359 [02] F7 1349 sta ,x ;Write data to the desired EEPROM address 835A [02] A601 1350 lda #EEPGM ;Set the EEPGM bit in the EECR 835C [04] CAFE1D 1351 ora EECR 835F [04] C7FE1D 1352 sta EECR 8362 [05] CD80CE 1353 jsr Wait100ms ;Wait 10ms to program the byte. 8365 [02] A601 1354 lda #EEPGM ;clear EEPGM 8367 [01] 43 1355 coma 8368 [04] C4FE1D 1356 and EECR 836B [04] C7FE1D 1357 sta EECR 836E [05] CD810C 1358 jsr Wait100us ;Wait 100us for pgm voltage to fall. 8371 [02] A604 1359 lda #EELAT 8373 [01] 43 1360 coma ;clear EELAT 8374 [04] C4FE1D 1361 and EECR 8377 [04] C7FE1D 1362 sta EECR 837A [04] 81 1363 rts 1364 1365 ;--------------------------------------------------- ----------------------- 1366 ; Erase_EEPROM_All -- Bulk erase all EEPROM locations (800-9FF) 1367 1368 Erase_EEPROM_all: template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 36 837B [03] 450800 1369 ldhx #$800 ;any location in EEPROM area will do bulk erase 837E [04] C6FE1D 1370 lda EECR 8381 [02] AA18 1371 ora #(EERAS1|EERAS0) 8383 [04] C7FE1D 1372 sta EECR 8386 [03] 200A 1373 bra ee_1 1374 1375 ;--------------------------------------------------- ----------------------- 1376 ; Erase_EEPROM_Byte -- Erase target EEPROM address H:X (in the range 800-9FF) 1377 1378 Erase_EEPROM_byte: 8388 [04] C6FE1D 1379 lda EECR 838B [02] A4EF 1380 and #$EF ;clear EERAS1 (b4) 838D [02] AA08 1381 ora #$08 ;set EERAS0 (b3) 838F [04] C7FE1D 1382 sta EECR 8392 [02] AA04 1383 ee_1: ora #EELAT ;set EELAT in EECR 8394 [04] C7FE1D 1384 sta EECR 8397 [02] F7 1385 sta ,x ;write any data to the target location erases 8398 [02] A601 1386 lda #EEPGM ;Set the EEPGM bit in the EECR 839A [04] CAFE1D 1387 ora EECR 839D [04] C7FE1D 1388 sta EECR 83A0 [05] CD80CE 1389 jsr Wait100ms ;Wait 10ms for byte erase 83A3 [02] A601 1390 lda #EEPGM 83A5 [01] 43 1391 coma ;clear EEPGM 83A6 [04] C4FE1D 1392 and EECR 83A9 [04] C7FE1D 1393 sta EECR 83AC [05] CD810C 1394 jsr Wait100us ;Wait 100us for pgm voltage to fall. 83AF [02] A604 1395 lda #EELAT 83B1 [01] 43 1396 coma ;clear EELAT 83B2 [04] C4FE1D 1397 and EECR 83B5 [04] C7FE1D 1398 sta EECR 83B8 [04] 81 1399 rts 1400 1401 ;--------------------------------------------------- ----------------------- 1402 ; Init_EEPROM -- Initialize the EEPROM configuration registers 1403 ; This is a nonvolatile register setting 1404 1405 Init_EEPROM: 83B9 [05] CD83D6 1406 jsr EEPROM_On ;Turn on array for operation 1407 83BC [02] A610 1408 lda #$10 ;lower 4 bits are positions for EEPROM bank enables 83BE [03] 45FE1C 1409 ldhx #EENVR 83C1 [05] CD8346 1410 jsr Write_EEPROM_Byte ;enable the EEPROM template.asm Assembled with CASM08Z 4/22/2003 7:46:07 PM PAGE 37 83C4 [02] F6 1411 lda ,x ;puts new settings into effect 1412 83C5 [02] A680 1413 lda #$80 ;set upper bit EEDIVSECD to allow the values to be modified later 83C7 [03] 45FE10 1414 ldhx #EEDIVHNVR 83CA [05] CD8346 1415 jsr Write_EEPROM_Byte ;write the high divider byte 83CD [02] A6AC 1416 lda #172 ;divider value is 170 (based on CGMXCLK clock of 4.9152 MHz) 83CF [03] 45FE1